RTL, ASIC flow, and verification
Build open-source blocks, learn synthesis and timing, write tests, and bring student projects into complete design pipelines.
NUSi - Northwestern University Silicon Initiative
Student-led silicon design and fabrication at Northwestern.
NUSi gives students a practical path into chip design and fabrication, from RTL and verification through physical design, cleanroom process development, project documentation, and industry-facing events.
What happens here
From design to fabrication!
Design Fabrication Equipment
Develop semiconductor tooling and connect classroom device physics to fabrication practices.
Industry events and workshops
Host technical speakers, tool walkthroughs, design reviews, and career conversations with engineers across the semiconductor stack.
Join or propose a project
Contribute to tutorials, emulation rigs, physical design experiments, fabrication notes, and student-led silicon project logs.
Docs
Read the NUSi technical docs
The living docs are on our docs page, where NUSi can maintain getting-started guides, RTL notes, verification references, physical design workflows, fabrication SOPs, and tool setup pages.
Open Docs
Getting Started
RTL Design
Verification
Physical Design
Fabrication SOPs
Tool Setup